BULLETIN NUMBER:  SWB-053

DATE ISSUED:  December 20, 2006

DATE CLOSED: 

AFFECTED SYSTEMS:  Power Hawk Model 940 Systems

RELEASE LEVEL:  PowerMAX OS 6.3

 

EXPLANATION:  A problem found in the Marvell Discovery III system controller chip on the Power Hawk 940 VAFQ systems can cause back-to-back read instructions to be sent to a device when only one was requested during high PCI bus traffic conditions.  For devices that are sensitive to destructive reads including those with FIFOs or read-and-clear registers, this can result in data loss,  corrupted data, or hang conditions.

 

RESOLUTION:  This problem can be worked around by adding a series of commands to the ASTRix “post” script that will modify the PCI H/W Strict Ordering and Deadlock Avoidance registers prior to booting PowerMAX OS.  These register values are dependent on the PCI0 and PCI1 configuration start addresses and sizes.   The register values given below are the values required for a PCI configuration of:

 

     PCI 0 Start Addr (ex. 0x80000000):            0x80000000 =

     PCI 0 Size       (ex. 0x30000000 (768GB)):    0x30000000 =

     PCI 1 Start Addr (ex. 0xB0000000):            0xC0000000 =

     PCI 1 Size       (ex. 0x10000000 (256MB)):    0x30000000 =

 

If your configuration has different values for either the start addresses or sizes, you must contact the CCUR Hotline for the proper values to use.  The following procedure should be used to change the “post” script so the PCI H/W Strict Ordering and Deadlock Avoidance registers will be modified on every boot.

 

                Enter ASTRix from STAR:

                                STAR0> astrix

                Locate the “post”  script and modify it:

                                * cd /nvram

            * cp post post.orig

            * vi post  

                               

                Add the following lines within the test for cpuid 0:

                             printf("Resetting H/W Strict Ordering: PCI0 & PCI1\n");

            // PCI0

               wlle 0xffd00048 0x0100fc00;

               wlle 0xffd00058 0x01008000;

               wlle 0xffd00080 0x0100a000;

               wlle 0xffd00280 0x0100f000;

            // PCI1 (VME)

               wlle 0xffd00090 0x0100fe00;

               wlle 0xffd000a0 0x0100c000;

               wlle 0xffd000b0 0x0100e000;

               wlle 0xffd002b0 0x0100f400;

            printf("Resetting Deadlock Avoidance: PCI0 & PCI1\n");

               wlle 0xffd002d0 0x000000ff;

 

Write and exit vi

             Run "cat post" to verify the lines were entered correctly

                        * cat post

             Return to STAR

                        * star

             Boot PowerMAX OS normally.